HAL_CLK. More...

Enumerations
enum	clk_d0_div { CLK_D0_DIV1 = 1, CLK_D0_DIV2 = 0 }
	Clock D0 domain divider. More...

enum	clk_d1_div { CLK_D1_DIV2 = 1, CLK_D1_DIV4 = 2, CLK_D1_DIV8 = 3 }
	Clock D1 domain divider. More...

enum	clk_d2_div { CLK_D2_DIV1 = 0, CLK_D2_DIV2 = 1, CLK_D2_DIV4 = 3 }
	Clock D2 domain divider. More...

enum	clk_tim_div { CLK_TIM_DIV4 = 1, CLK_TIM_DIV8 = 2, CLK_TIM_DIV2 = 3 }
	Timer clock 1 divider. More...

enum	clk_sdm_mux { CLK_I2S_MSTR_SCLK, CLK_I2S_SLV_SCLK_PAD, CLK_PDM }
	Audio speaker and SD clock mux. More...

enum	clk_efuse_div { CLK_EFUSE_DIV4 = 0, CLK_EFUSE_DIV8 }
	Efuse clock divider. More...

enum	clk_smem_div { CLK_SMEM_DIV1 = 0, CLK_SMEM_DIV2 = 1, CLK_SMEM_DIV4 = 3, CLK_SMEM_DIV8 = 7 }
	share memory clock divider More...

enum	clk_qspi_div { CLK_QSPI_DIV1 = 0, CLK_QSPI_DIV2 = 1, CLK_QSPI_DIV4 = 3, CLK_QSPI_DIV8 = 7 }
	QSPI serial clock divider. More...

enum	clk_systick_div { CLK_SYSTICK_DIV4 = 1, CLK_SYSTICK_DIV8 = 2, CLK_SYSTICK_DIV16 = 3 }
	systick clock divider More...

enum	clk_error { CLK_ERR_NO_ERROR = 0, CLK_ERR_INVALID_PARAM = -1 }
	Error return code. More...

Functions
void	hal_clk_calib_xo (void)
	Calibrate XO. More...

uint32_t	hal_clk_root_get (void)
	Get Root clock. More...

int	hal_clk_cpu_set (uint32_t cpu_clk)
	Set CPU clock. More...

uint32_t	hal_clk_cpu_get (void)
	Get CPU clock. More...

int	hal_clk_d0_mux (int mux)
	Set D0 domain clock. More...

uint32_t	hal_clk_d0_get (void)
	Get D0 domanin clock. More...

int	hal_clk_d1_mux (int mux)
	Set D1 domain clock. More...

uint32_t	hal_clk_d1_get (void)
	Get D1 domanin clock. More...

int	hal_clk_d2_mux (int mux)
	Set D2 domain clock. More...

uint32_t	hal_clk_d2_get (void)
	Get D2 domanin clock. More...

int	hal_clk_tmr_mux (int tmr_id, int mux)
	Set Timer clock. More...

uint32_t	hal_clk_tmr_get (int tmr_id)
	Get Timer clock. More...

int	hal_clk_sadc_mux (int mux)
	Set Sensor ADC clock. More...

uint32_t	hal_clk_sadc_get (void)
	Get SADC clock. More...

int	hal_clk_smem_mux (int mux)
	Set Shared memory clock. More...

int	hal_clk_qspi_mux (int mux)
	Set QSPI speed clock. More...

void	hal_clk_audio_sdm_mux (int mux)
	Audio sigma delta modulator clock source mux. More...

uint32_t	hal_clk_qspi_get (void)
	Get QSPI clock. More...

int	hal_clk_efuse_mux (int mux)
	Set Efuse clock. More...

void	hal_clk_si2s_set (int ext_clk)
	Set Slave I2S clock source. More...

void	hal_clk_mi2s_set (uint32_t bit_clk)
	Set Master I2S bit clock. More...

void	hal_clk_audio_output (int mux)
	Set audio output (Speaker/Sigma Delta) clock mux. More...

void	hal_clk_efuse_en (int en)
	Enable or disable Efuse clock. More...

void	hal_clk_uart_en (int id, int on)
	Enable or disable Uart clock. More...

void	hal_clk_i2c_en (int id, int on)
	Enable or disable I2c clock. More...

void	hal_clk_pwm_en (int on)
	Enable or disable PWM clock. More...

void	hal_clk_wdt_en (int on)
	Enable or disable Watch Dog Timer clock. More...

void	hal_clk_kb_en (int on)
	Enable or disable keyboard clock. More...

void	hal_clk_ecc_en (int on)
	Enable or disable ECC clock. More...

void	hal_clk_hash_en (int on)
	Enable or disable hash clock. More...

void	hal_clk_aes_en (int on)
	Enable or disable AES clock. More...

void	hal_clk_counter_en (int on)
	Enable or disable counter clock. More...

void	hal_clk_audio_en (int en)
	Enable or disable shared audio clock. More...

void	hal_clk_audio_enc_en (int en)
	Enable or disable audio encoder related clock. More...

void	hal_clk_audio_dec_en (int en)
	Enable or disable audio decoder related clock. More...

void	hal_clk_audio_resample_en (int en)
	Enable or disable audio reampling related clock. More...

void	hal_clk_sadc_en (int on)
	Enable or disable sensor ADC clock. More...

void	hal_clk_i2s_en (int id, int on)
	Enable or disable I2S clock. More...

void	hal_clk_quaddec_en (int on)
	Enable or disable QD clock. More...

void	hal_clk_dma_en (int on)
	Enable or disable DMA clock. More...

void	hal_clk_ble_en (int on)
	Enable or disable BLE clock. More...

void	hal_clk_gpio_intr (int port, int on)
	Enable or disable GPIO interrupt controller clock. More...

void	hal_clk_mspi_en (int on)
	Enable or disable master SPI clock. More...

void	hal_clk_sspi_en (int id, int on)
	Enable or disable slave SPI clock. More...

void	hal_clk_sm_en (int on)
	Enable or disable share memory clock. More...

void	hal_clk_tmr_en (int tim_id, int en)
	Enable or disable Timer clock. More...

void	hal_clk_32k (int clk_src)
	Select 32k clock source. More...

int	hal_clk_32k_ready (void)
	Check if RTC is ready. More...

uint32_t	hal_clk_32k_get (void)
	Get slow clock (low power clock) rate. More...

void	hal_clk_calib_32k (int cycles)
	Calibrate Low Power Clock (RC/RTC) timer. More...

int	hal_clk_systick_mux (int mux)
	Set Inplay's Systick clock. More...

uint32_t	hal_clk_systick_get (void)
	Get Inplay systick clock. More...

void	hal_clk_systick_en (int en)
	Enable or disable Inplay's systick clock. More...

Detailed Description

HAL_CLK.

Enumeration Type Documentation

◆ clk_d0_div

enum clk_d0_div

Clock D0 domain divider.

Enumerator
CLK_D0_DIV1	Divided by 1 of 32MXO/32MRC. This is default.
CLK_D0_DIV2	Divided by 2 of 32MXO/32MRC.

◆ clk_d1_div

enum clk_d1_div

Clock D1 domain divider.

Enumerator
CLK_D1_DIV2	Divided by 2 of XOX2/XO/32MRC. This is default.
CLK_D1_DIV4	Divided by 4 of XOX2/XO/32MRC.
CLK_D1_DIV8	Divided by 8 of XOX2/XO/32MRC.

◆ clk_d2_div

enum clk_d2_div

Clock D2 domain divider.

Enumerator
CLK_D2_DIV1	Divided by 1 of XO/32MRC.
CLK_D2_DIV2	Divided by 2 of XO/32MRC. This is default.
CLK_D2_DIV4	Divided by 4 of XO/32MRC.

◆ clk_efuse_div

enum clk_efuse_div

Efuse clock divider.

Enumerator
CLK_EFUSE_DIV4	Divided by 4 of XO/32MRC.
CLK_EFUSE_DIV8	Divided by 8 of XO/32MRC. This is default.

◆ clk_error

enum clk_error

Error return code.

Enumerator
CLK_ERR_NO_ERROR	No error.
CLK_ERR_INVALID_PARAM	Invalid input paramters.

◆ clk_qspi_div

enum clk_qspi_div

QSPI serial clock divider.

Enumerator
CLK_QSPI_DIV1	Divided by 1 of XO/32MRC.
CLK_QSPI_DIV2	Divided by 2 of XO/32MRC. This is default.
CLK_QSPI_DIV4	Divided by 4 of XO/32MRC.
CLK_QSPI_DIV8	Divided by 8 of XO/32MRC.

◆ clk_sdm_mux

enum clk_sdm_mux

Audio speaker and SD clock mux.

Enumerator
CLK_I2S_MSTR_SCLK	I2S master clock generated from integer divider.
CLK_I2S_SLV_SCLK_PAD	I2S slave clock from PAD.
CLK_PDM	PDM clock.

◆ clk_smem_div

enum clk_smem_div

share memory clock divider

Enumerator
CLK_SMEM_DIV1	Divided by 1 of XO/32MRC.
CLK_SMEM_DIV2	Divided by 2 of XO/32MRC. This is default.
CLK_SMEM_DIV4	Divided by 4 of XO/32MRC.
CLK_SMEM_DIV8	Divided by 8 of XO/32MRC.

◆ clk_systick_div

enum clk_systick_div

systick clock divider

Enumerator
CLK_SYSTICK_DIV4	Divided by 4 of XO/32MRC. This is default.
CLK_SYSTICK_DIV8	Divided by 8 of XO/32MRC.
CLK_SYSTICK_DIV16	Divided by 16 of XO/32MRC.

◆ clk_tim_div

enum clk_tim_div

Timer clock 1 divider.

Enumerator
CLK_TIM_DIV4	Divided by 4 of XO/32MRC.
CLK_TIM_DIV8	Divided by 8 of XO/32MRC.
CLK_TIM_DIV2	Divided by 2 of XO/32MRC.

Function Documentation

◆ hal_clk_32k()

void hal_clk_32k ( int clk_src )

Select 32k clock source.

Parameters

[in] clk_src 1: RTC, 0: RC

Returns: NULL

◆ hal_clk_32k_get()

uint32_t hal_clk_32k_get ( void )

Get slow clock (low power clock) rate.

Returns: Slow clock rate.

◆ hal_clk_32k_ready()

int hal_clk_32k_ready ( void )

Check if RTC is ready.

Returns: 1: RTC ready, 0: Otherwise

◆ hal_clk_aes_en()

void hal_clk_aes_en ( int on )

Enable or disable AES clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_audio_dec_en()

void hal_clk_audio_dec_en ( int en )

Enable or disable audio decoder related clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_audio_en()

void hal_clk_audio_en ( int en )

Enable or disable shared audio clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_audio_enc_en()

void hal_clk_audio_enc_en ( int en )

Enable or disable audio encoder related clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_audio_output()

void hal_clk_audio_output ( int mux )

Set audio output (Speaker/Sigma Delta) clock mux.

Parameters

[in] mux 0: I2S master sclk generated from integer divider 1: I2S slave clock from PAD 2: PDM clock

Returns: NULL

◆ hal_clk_audio_resample_en()

void hal_clk_audio_resample_en ( int en )

Enable or disable audio reampling related clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_audio_sdm_mux()

void hal_clk_audio_sdm_mux ( int mux )

Audio sigma delta modulator clock source mux.

Parameters

[in] mux SDM clock source mux,

See also: enum clk_sdm_mux

Returns: NULL

◆ hal_clk_ble_en()

void hal_clk_ble_en ( int on )

Enable or disable BLE clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_calib_32k()

void hal_clk_calib_32k ( int cycles )

Calibrate Low Power Clock (RC/RTC) timer.

Parameters

[in] cycles Calibrate cycles (2 ^ cycles)

Returns: NULL

◆ hal_clk_calib_xo()

void hal_clk_calib_xo ( void )

Calibrate XO.

Returns: NULL

◆ hal_clk_counter_en()

void hal_clk_counter_en ( int on )

Enable or disable counter clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_cpu_get()

uint32_t hal_clk_cpu_get ( void )

Get CPU clock.

Returns: CPU clock

◆ hal_clk_cpu_set()

int hal_clk_cpu_set ( uint32_t cpu_clk )

Set CPU clock.

Parameters

[in] cpu_clk XO: 64000000, 32000000, 16000000, and 8000000, RC: 32000000, 16000000, 8000000, 4000000

Returns: NULL

◆ hal_clk_d0_get()

uint32_t hal_clk_d0_get ( void )

Get D0 domanin clock.

Returns: D0 domain clock

◆ hal_clk_d0_mux()

int hal_clk_d0_mux ( int mux )

Set D0 domain clock.

Parameters

[in] mux D0 domain clock mux,

See also: enum clk_d0_div

Returns: NULL

◆ hal_clk_d1_get()

uint32_t hal_clk_d1_get ( void )

Get D1 domanin clock.

Returns: D1 domain clock

◆ hal_clk_d1_mux()

int hal_clk_d1_mux ( int mux )

Set D1 domain clock.

Parameters

[in] mux D1 domain clock mux,

See also: enum clk_d1_div

Returns: NULL

◆ hal_clk_d2_get()

uint32_t hal_clk_d2_get ( void )

Get D2 domanin clock.

Returns: D2 domain clock

◆ hal_clk_d2_mux()

int hal_clk_d2_mux ( int mux )

Set D2 domain clock.

Parameters

[in] mux D2 domain clock mux,

See also: enum clk_d2_div

Returns: NULL

◆ hal_clk_dma_en()

void hal_clk_dma_en ( int on )

Enable or disable DMA clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_ecc_en()

void hal_clk_ecc_en ( int on )

Enable or disable ECC clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_efuse_en()

void hal_clk_efuse_en ( int en )

Enable or disable Efuse clock.

Parameters

[in] en 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_efuse_mux()

int hal_clk_efuse_mux ( int mux )

Set Efuse clock.

Parameters

[in] mux Efuse clock divider,

See also: enum clk_efuse_div

Returns: NULL

◆ hal_clk_gpio_intr()

void hal_clk_gpio_intr	(	int	port,
		int	on
	)

Enable or disable GPIO interrupt controller clock.

Parameters

[in] port Port number,

See also: enum gpio_port

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_hash_en()

void hal_clk_hash_en ( int on )

Enable or disable hash clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_i2c_en()

void hal_clk_i2c_en	(	int	id,
		int	on
	)

Enable or disable I2c clock.

Parameters

[in] id I2c Id,

See also: enum i2c_id

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_i2s_en()

void hal_clk_i2s_en	(	int	id,
		int	on
	)

Enable or disable I2S clock.

Parameters

[in] id I2S Id,

See also: enum i2s_id

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_kb_en()

void hal_clk_kb_en ( int on )

Enable or disable keyboard clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_mi2s_set()

void hal_clk_mi2s_set ( uint32_t bit_clk )

Set Master I2S bit clock.

Parameters

[in] bit_clk Serial bit clock

Returns: NULL

◆ hal_clk_mspi_en()

void hal_clk_mspi_en ( int on )

Enable or disable master SPI clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_pwm_en()

void hal_clk_pwm_en ( int on )

Enable or disable PWM clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_qspi_get()

uint32_t hal_clk_qspi_get ( void )

Get QSPI clock.

Returns: QSPI clock

◆ hal_clk_qspi_mux()

int hal_clk_qspi_mux ( int mux )

Set QSPI speed clock.

Parameters

[in] mux Qspi clock divider,

See also: enum clk_qspi_div

Returns: CLK_ERR_NO_ERROR if successful, otherwise

See also: enum clk_error.

◆ hal_clk_quaddec_en()

void hal_clk_quaddec_en ( int on )

Enable or disable QD clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_root_get()

uint32_t hal_clk_root_get ( void )

Get Root clock.

Returns: Root clock

◆ hal_clk_sadc_en()

void hal_clk_sadc_en ( int on )

Enable or disable sensor ADC clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_sadc_get()

uint32_t hal_clk_sadc_get ( void )

Get SADC clock.

Returns: SADC clock

◆ hal_clk_sadc_mux()

int hal_clk_sadc_mux ( int mux )

Set Sensor ADC clock.

Parameters

[in] mux Sadc domain clock mux,

See also: enum clk_sadc_div

Returns: CLK_ERR_NO_ERROR if successful, otherwise

See also: enum clk_error.

◆ hal_clk_si2s_set()

void hal_clk_si2s_set ( int ext_clk )

Set Slave I2S clock source.

Parameters

[in] ext_clk 1: From external, 0: From internal.

Returns: NULL

◆ hal_clk_sm_en()

void hal_clk_sm_en ( int on )

Enable or disable share memory clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_smem_mux()

int hal_clk_smem_mux ( int mux )

Set Shared memory clock.

Parameters

[in] mux Smem domain clock mux,

See also: enum clk_smem_div

Returns: CLK_ERR_NO_ERROR if successful, otherwise

See also: enum clk_error.

◆ hal_clk_sspi_en()

void hal_clk_sspi_en	(	int	id,
		int	on
	)

Enable or disable slave SPI clock.

Parameters

[in] id SPI slave id,

See also: enum spi_id

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_systick_en()

void hal_clk_systick_en ( int en )

Enable or disable Inplay's systick clock.

Parameters

[in] en 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_systick_get()

uint32_t hal_clk_systick_get ( void )

Get Inplay systick clock.

Returns: Systick clock

◆ hal_clk_systick_mux()

int hal_clk_systick_mux ( int mux )

Set Inplay's Systick clock.

Parameters

[in] mux Systick clock mux,

See also: enum clk_systick_div

Returns: NULL

◆ hal_clk_tmr_en()

void hal_clk_tmr_en	(	int	tim_id,
		int	en
	)

Enable or disable Timer clock.

Parameters

[in] tim_id Timer Id,

See also: enum tim_id

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_tmr_get()

uint32_t hal_clk_tmr_get ( int tmr_id )

Get Timer clock.

Returns: Timer clock

◆ hal_clk_tmr_mux()

int hal_clk_tmr_mux	(	int	tmr_id,
		int	mux
	)

Set Timer clock.

Parameters

[in] mux Timer clock mux,

See also: enum clk_tim_div

Returns: NULL

◆ hal_clk_uart_en()

void hal_clk_uart_en	(	int	id,
		int	on
	)

Enable or disable Uart clock.

Parameters

[in] id Uart Id,

See also: enum uart_id

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

◆ hal_clk_wdt_en()

void hal_clk_wdt_en ( int on )

Enable or disable Watch Dog Timer clock.

Parameters

[in] on 1: Enable, 0: otherwise

Returns: NULL

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

◆ clk_d0_div

◆ clk_d1_div

◆ clk_d2_div

◆ clk_efuse_div

◆ clk_error

◆ clk_qspi_div

◆ clk_sdm_mux

◆ clk_smem_div

◆ clk_systick_div

◆ clk_tim_div

Function Documentation

◆ hal_clk_32k()

◆ hal_clk_32k_get()

◆ hal_clk_32k_ready()

◆ hal_clk_aes_en()

◆ hal_clk_audio_dec_en()

◆ hal_clk_audio_en()

◆ hal_clk_audio_enc_en()

◆ hal_clk_audio_output()

◆ hal_clk_audio_resample_en()

◆ hal_clk_audio_sdm_mux()

◆ hal_clk_ble_en()

◆ hal_clk_calib_32k()

◆ hal_clk_calib_xo()

◆ hal_clk_counter_en()

◆ hal_clk_cpu_get()

◆ hal_clk_cpu_set()

◆ hal_clk_d0_get()

◆ hal_clk_d0_mux()

◆ hal_clk_d1_get()

◆ hal_clk_d1_mux()

◆ hal_clk_d2_get()

◆ hal_clk_d2_mux()

◆ hal_clk_dma_en()

◆ hal_clk_ecc_en()

◆ hal_clk_efuse_en()

◆ hal_clk_efuse_mux()

◆ hal_clk_gpio_intr()

◆ hal_clk_hash_en()

◆ hal_clk_i2c_en()

◆ hal_clk_i2s_en()

◆ hal_clk_kb_en()

◆ hal_clk_mi2s_set()

◆ hal_clk_mspi_en()

◆ hal_clk_pwm_en()

◆ hal_clk_qspi_get()

◆ hal_clk_qspi_mux()

◆ hal_clk_quaddec_en()

◆ hal_clk_root_get()

◆ hal_clk_sadc_en()

◆ hal_clk_sadc_get()

◆ hal_clk_sadc_mux()

◆ hal_clk_si2s_set()

◆ hal_clk_sm_en()

◆ hal_clk_smem_mux()

◆ hal_clk_sspi_en()

◆ hal_clk_systick_en()

◆ hal_clk_systick_get()

◆ hal_clk_systick_mux()

◆ hal_clk_tmr_en()

◆ hal_clk_tmr_get()

◆ hal_clk_tmr_mux()

◆ hal_clk_uart_en()

◆ hal_clk_wdt_en()