34 PHY_RATE_CODED_125K = 2,
35 PHY_RATE_CODED_500K = 3,
41 SDR_RX_STATUS_NOERR = 0,
43 SDR_RX_STATUS_CRCERR = 0x1,
45 SDR_RX_STATUS_SYNCERR = 0x2,
51 SDR_ERR_INVALID_PARAM = -1,
52 SDR_ERR_TX_DATA_ALLOC = -2,
53 SDR_ERR_TX_DESC_ALLOC = -3,
54 SDR_ERR_RX_DATA_ALLOC = -4,
55 SDR_ERR_RX_DESC_ALLOC = -5,
56 SDR_ERR_TX_NOACK = -6,
58 SDR_ERR_NOT_READY = -8,
85 static __inline
void sdr_abort(uint8_t pulse_width)
87 uint32_t reg = IPMAC_REG_BLE_ABORT_REQ_CTL_BLE_ABORT_REQ|
88 ((pulse_width & IPMAC_REG_BLE_ABORT_REQ_CTL_BLE_ABORT_PULSE_DUR_MASK) << IPMAC_REG_BLE_ABORT_REQ_CTL_BLE_ABORT_PULSE_DUR_SHIFT) |
89 IPMAC_REG_BLE_ABORT_REQ_CTL_BLE_ABORT_ERROR_FLAG_SET;
90 WR_WORD(IPMAC_REG_BLE_ABORT_REQ, reg);
93 static __inline uint32_t sdr_misc_read(
void)
95 return RD_WORD(IPMAC_REG_SDR_MISC_CTRL);
98 static __inline
void sdr_misc_ctl(
int en,
int no_ts,
int no_fine_ts,
int match_da,
int match_sa,
int slv_sbt,
int mstr_abt)
100 uint32_t reg = RD_WORD(IPMAC_REG_SDR_MISC_CTRL);
103 reg |= IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_EN;
105 reg &= ~IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_EN;
108 reg |= IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_IGNORE_TIMESTAMP;
110 reg &= ~IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_IGNORE_TIMESTAMP;
113 reg |= IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_IGNORE_TIMESTAMP_FINE;
115 reg &= ~IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_IGNORE_TIMESTAMP_FINE;
118 reg |= IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_MATCHING_DEST_ADDR;
120 reg &= ~IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_MATCHING_DEST_ADDR;
123 reg |= IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_MATCHING_SRC_ADDR ;
125 reg &= ~IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_MATCHING_SRC_ADDR;
128 reg |= IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_SLV_ABORT_EVT_SINGLE_CRCERR ;
130 reg &= ~IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_SLV_ABORT_EVT_SINGLE_CRCERR;
133 reg |= IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_MSTR_ABORT_EVT_SINGLE_CRCERR ;
135 reg &= ~IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_MSTR_ABORT_EVT_SINGLE_CRCERR;
137 WR_WORD(IPMAC_REG_SDR_MISC_CTRL, reg);
140 static __inline
void sdr_misc_write(uint32_t reg)
142 WR_WORD(IPMAC_REG_SDR_MISC_CTRL, reg);
145 static __inline
void sdr_restart_ctl(
int no_match,
int sigl_match, uint32_t us)
147 uint32_t reg = RD_WORD(IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH);
150 reg |= IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_CTL_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH;
152 reg &= ~IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_CTL_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH;
155 reg |= IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_CTL_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_SINGLE;
157 reg &= ~IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_CTL_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_SINGLE;
159 reg &= ~IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_CTL_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_IDLE_LMT;
160 reg |= (us & IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_CTL_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_IDLE_LMT_MASK) <<
161 IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_CTL_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH_IDLE_LMT_SHIFT;
163 WR_WORD(IPMAC_REG_SDR_RESTART_DUE_TO_RX_ADDR_MISMATCH, reg);
167 static __inline
void sdr_rx_da_ctl(uint16_t da, uint16_t mask)
169 uint32_t reg = da | (mask << IPMAC_REG_SDR_DEST_ADDR_TO_MATCH_CTL_SDR_DEST_ADDR_MATCH_MASK_SHIFT);
170 WR_WORD(IPMAC_REG_SDR_DEST_ADDR_TO_MATCH, reg);
173 static __inline
void sdr_rx_sa_ctl(
int idx, uint16_t sa, uint16_t mask)
175 uint32_t reg = sa | (mask << IPMAC_REG_SDR_SRC_ADDR_TO_MATCH_0_CTL_SDR_SRC_ADDR_0_MATCH_MASK_SHIFT);
176 WR_WORD((IPMAC_REG_SDR_SRC_ADDR_TO_MATCH_0 + idx * 4), reg);
179 static __inline uint16_t sdr_tx_da_addr(
void)
181 return ((RD_WORD(IPMAC_REG_SDR_TX_ADDR) >> IPMAC_REG_SDR_TX_ADDR_STS_SDR_TX_DEST_ADDR_SHIFT) & IPMAC_REG_SDR_TX_ADDR_STS_SDR_TX_DEST_ADDR_MASK);
184 static __inline uint16_t sdr_tx_sa_addr(
void)
186 return (RD_WORD(IPMAC_REG_SDR_TX_ADDR) & IPMAC_REG_SDR_TX_ADDR_STS_SDR_TX_SRC_ADDR_MASK);
189 static __inline uint16_t sdr_rx_da_addr(
void)
191 return ((RD_WORD(IPMAC_REG_SDR_RX_ADDR) >> IPMAC_REG_SDR_RX_ADDR_STS_SDR_RX_DEST_ADDR_SHIFT) & IPMAC_REG_SDR_RX_ADDR_STS_SDR_RX_DEST_ADDR_MASK);
194 static __inline uint16_t sdr_rx_sa_addr(
void)
196 return (RD_WORD(IPMAC_REG_SDR_RX_ADDR) & IPMAC_REG_SDR_RX_ADDR_STS_SDR_RX_SRC_ADDR_MASK);
199 static __inline
void sdr_ignore_timestamp(
int en)
202 WR_WORD(IPMAC_REG_SDR_MISC_CTRL, (IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_EN|IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_IGNORE_TIMESTAMP|IPMAC_REG_SDR_MISC_CTRL_CTL_SDR_IGNORE_TIMESTAMP_FINE));
204 WR_WORD(IPMAC_REG_SDR_MISC_CTRL, 0);
223 int sdr_init(
void *pv);
235 void sdr_deinit(
void *pv);
262 int sdr_mstr_to_slv(
char mode, uint32_t aa,
char chn,
char txr,
char rxr, uint16_t mst_a, uint16_t slv_a, uint16_t rx_da_mask, uint16_t tx_len, uint8_t *tx_buf, uint16_t *actual_tx_bytes,
void *arg,
void(*rx_callback)(
void *arg, rx_param_t *para));
300 int sdr_slv_to_mstr(
char mode,
int slv_ack, uint32_t aa,
char chn,
char txr,
char rxr, uint16_t rxw_sz, uint16_t slv_a, uint16_t rx_da_mask,
char nb_mstr, uint16_t mst_a[8], uint16_t mst_a_mask[8], uint16_t tx_len[8], uint8_t *tx_buf[8], uint16_t actual_tx_bytes_array[8],
void *arg,
void(*rx_callback)(
void *arg, rx_param_t *para));